Apparatus, methods, and computer program products for determining the coefficients of a function with decreased latency.

ABSTRACT

The present invention provides apparatus, methods, and computer program products that can decrease the latency with which the coefficients of a function representative of signal are determined. Specifically, the apparatus, methods, and computer program products of the present invention, taking advantage of the independence of samples, updates each of the coefficients of the function as each sample is received. As such, when the final sample is received, the apparatus, methods, and computer program products of the present invention need only update each coefficient with the contribution of the last sample prior to outputting the coefficients. As such, the latency from the time the last sample is received and the availability of the coefficients is decreased. To further decrease the latency, in one embodiment, the apparatus, methods, and computer program products of the present invention prestore either all or a portion of the possible values of the contribution of a sample to each coefficient, such that. As such, when the sample is received, the apparatus, methods, and computer program products of the present invention evaluate the value of the sample and retrieve the appropriate value from the prestored values that corresponds to the coefficient, sample, and value of the sample, thereby decreasing the time required to determine the coefficients. The apparatus, methods, and computer program products of the present invention also allow individual or subsets of the coefficients to be observed and also allow individual or subsets of the coefficients to be determined in varying resolutions.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority from the following U.S.provisional patent applications the contents of each of which areincorporated herein by reference: U.S. provisional patent applicationsSer. No. 60/131,656, entitled: EXPLOITING REDUNDANT VALUES TO PERMIT USEOF PRE-CALCULATIONS, Ser. No. 60/131,661, entitled: NOVEL PARADIGM FOREVALUATING FOURIER COEFFICIENTS, entitled: FIRST NOVEL PROCESSINGCIRCUIT, Ser. No. 60/131,667, entitled: USING GATING WITH THE VALUESORTING METHOD, Ser. No. 60/131,825, entitled: SECOND NOVEL PROCESSINGCIRCUIT, Ser. No. 60/131,858, all filed on Apr. 29, 1999 and U.S.provisional patent applications Ser. No. 60/185,346, entitled: METHODSAND APPARATUS FOR PROCESSING AND ANALYZING INFORMATION, filed on Feb.26, 2000.

FIELD OF THE INVENTION

The present invention relates generally to the determination ofcoefficients of a function. More particularly, the apparatus, methods,and computer program products of the present invention relate todetermining the coefficients of a function representative of an inputsignal as each sample of the signal is received to decrease latency inthe determination of the coefficients.

BACKGROUND OF THE INVENTION

Signal processing is an important function of many electronic systems.In particular, in many electronic systems, data is transmitted in signalform. Further, some electronic systems analyze and monitor the operationof mechanical or chemical systems by observing the characteristics ofsignals, such as vibration signals and other types of signals, that areoutput from these systems. In light of this, methods have been developedto characterize signals such that information or data in the signal isavailable for data processing.

As one example, in many electronic systems, time domain signals aretypically transformed to the frequency domain prior to signalprocessing. A typical method for converting signals to the frequencydomain is performed using Fourier Transforms. The Fourier Transform of asignal is based on a plurality of samples of the time domain signaltaken over a selected time period, known as the base frequency. Based onthese samples of the signal the Fourier Transform provides a pluralityof coefficients, where the coefficients respectively represent theamplitude of a frequency that is a multiple of the base frequency. Thesecoefficients of the Fourier Transform, which represent the signal in thefrequency domain, are then used by electronic systems in processing thesignal.

Although Fourier Transforms are among some of the most widely usedfunctions for processing signals, there are other functions that areeither currently used or will be used in the future, as a betterunderstanding of their applicability is recognized. These functionsinclude Bessel functions, Legendre Polynomials, Tschebysheff Polynomialsof First and Second Kind, Jacoby Polynomials, Generalized LaguerrePolynomials, Hermite Polynomials, Bernoulli Polynomials, EulerPolynomials, and a variety of Matrices used in Quantum Mechanics, LinearAnalysis functions, wavelets and fractals just to name a few.

Although Fourier transforms and the other functions mentioned above areuseful in determining characteristics of signals for use in dataprocessing, there are some drawbacks to their use. Specifically,application of these functions to signals is typically computationallyintensive. This is disadvantageous as it may require the use ofspecialized processors in order to perform data processing. Further, andeven more importantly, the time required to perform the number ofcomputations using these functions may cause an unacceptable delay formany data processing applications. In fact, a goal of many dataprocessing systems is the ability to process data signals in real time,with no delay.

For example, the Fourier Series is defined as an infinite series ofcoefficients representing a signal. To transform a signal using aFourier Series would. require an infinite number of computations. Toremedy this problem, many conventional data processing systems useDiscrete Fourier Transforms (DFT), as opposed to the infinite FourierSeries. The DFT is the digital approximation to the Fourier Series andis used to process digitized analog information. Importantly, the DFTreplaces the infinite series of the Fourier Series with a finite set ofN evenly spaced samples taken over a finite period. The computation ofthe DFT therefore provides the same number of coefficients as thesamples received, instead of an infinite number of samples required bythe Fourier Series. As such, use of the DFT provides the mostsatisfactory current means to process the signal.

Because of the importance of reducing the time required to processsignals, however, methods have been developed to further reduce thenumber of computations required to perform a DFT of a signal.Specifically, the DFT procedure computes each coefficient by a similarprocess. The process for a general coefficient is; multiply each sampleby the sine or cosine of the normalized value of the independentvariable times the angular rate and sum over all of the samples. Thisprocedure defines N multiply-add steps for each of N coefficients, whichin turn, equates to N² multiply-add computations per DFT. As manysamples-of a signal are typically required to perform an adequateapproximation of the signal, the DFT of a signal is typicallycomputational and time intensive.

One of the methods developed to reduce the number of computations is thebutterfly method, which reduces the number of computations from N² to Ntimes log (N). The butterfly method is based on the fact that many ofthe trigonometric values of the DFT are the same due to periodicity ofthe functions. As such, the butterfly method reduces the matrixassociated with the DFT into N/2 two-point transforms (i.e., thetransforms representing each coefficient a_(n) and b_(n)). The butterflymethod further reduces the redundant trigonometric values of the DFT.Although the butterfly method reduces the number of computations overthe more traditional DFT method, it also adds complexity to the Fouriertransformation of a signal. Specifically, the butterfly method uses acomplex method for addressing the samples of the signal and the matrixcontaining the functions. This complexity can require the use ofspecialized processors and increase time for computation of the FourierTransform. By its nature, the butterfly is a batch process, which doesnot begin determination of the coefficients until after all of thesamples have been received. As described later, this method causeslatency in the determination of the coefficients of the function.

An additional problem with the DFT, besides the number of computationsrequired, is that the value of each coefficient of the DFT is a functionof all the samples of the signal. Therefore, none of the coefficients ofthe DFT can be determined until all of the samples have been processed.Once the last sample of a set is received, the values of all of thecoefficients can then be defined. As such, the time between the arrivalof the last sample and the availability of the coefficients is referredto as the latency of the system. If the time for processing thecoefficients is greater than the time to collect the set of samples, thesystem cannot operate in real time.

Although no coefficient is defined until all of the samples have beenreceived, there is an advantageous property of the DFT that has not beenheretofore recognized in the prior art. This property is theindependence of samples. In a set of samples being transformed in a DFTprocess, each sample makes a contribution to each coefficient based onlyon the sine or cosine of the applicable angle. This is illustrated inAppendix 1. Specifically, each of the coefficients of the DFT, (i.e.,A0, A1, A2, . . . and B0, B1, B2, . . . ), is the summation of theapplication of each sample to the sine and cosine functions associatedwith each coefficient. For example, the coefficient A1 is the summationA1₁+A1₂+ . . . A1₈, which are the application of each sample to thecosine function associated with the A1 coefficient. As each of thesamples are related to each coefficient by addition, each sample isindependent of the other samples and can be used to update thecoefficients prior to receipt of the other samples.

Many conventional systems for determining the Fourier Transform of asignal do not recognize this independence of samples aspect of the DFT.Specifically, conventional systems that use the DFT typically firstreceive a number of samples N of a signal, and only after all of thesamples have been received does the system generate each of thecoefficients. As such, these conventional systems have an associatedlatency equal to the time required for the system to compute each of thecoefficients after the last sample is received. This latency may besignificant. For example, if a conventional system determines a DFTusing N=64 samples, then the number of computations is N² or 4096. Forthe Fast Fourier Transform (FFT), this is reduced to N times log (N) or64(6) equals 364.

Appendix 1 illustrates an example of a data processing system that waitsuntil all of the samples have been received prior to determining thecoefficients of the DFT. As can be seen, the data processing systemillustrated in Appendix 1, first receives eight samples of the signalprior to beginning to process any of the coefficients of the FourierTransform. Only after receipt of the samples does the system begin tocalculate the coefficients. As latency is defined as the time betweenthe receipt of the last sample and the time at which the coefficientsare available, this data processing system has latency equal to the timerequired to perform all computations of the coefficients. As such, thisdata processing system cannot be used for real-time data processing. Asreal-time data processing or approximate real-time data processing isadvantageous for use in many data processing systems, it would bedesirous to provide apparatus and methods that decrease the timerequired to perform transformation of signals.

An additional problem with many conventional data processing systems,such as the butterfly, is that the coefficients of the function cannotbe independently observed due to the complexity of the system. Further,because the butterfly determines the coefficients in a batch method, asopposed to real time, individual coefficients can not be observed andtracked as each new sample is received. Because, the batch method ofanalysis adds latency, considerable processing must be employed withconventional systems to observe and track coefficients over time.Observance and tracking individual coefficients of a signal isadvantageous for in-depth signal analysis.

A still further problem with many conventional data processing systemsis that these systems typically do allow for variation of the resolutionof individual coefficients of the function. For example, the butterflyis configured to calculate each coefficient producing the same numbercoefficients as of samples. This may be disadvantageous in applicationsin which there is interest in only one or a subset of the coefficients,as the butterfly will spend time and resources determining coefficientsof less importance to the same resolution as those coefficients ofimportance. In light of this, it would be desirous to provide apparatusand methods that allow for the tracking and observance of individualcoefficients and also varying the resolution with which individualcoefficients are calculated.

SUMMARY OF THE INVENTION

As set forth below, the apparatus, methods, and computer programproducts of the present invention overcome many of the deficienciesidentified with processing signals using functions, such as FourierTransforms. In particular, the present invention provides apparatus,methods, and computer program products that determine the coefficientsof a function representative of an input signal with reduced latency,such that the coefficients of the function are made available within adecreased time from receipt of the last sample of the signal. Thepresent invention also provides apparatus, methods, and computer programproducts that reduce the amount of data that must stored in order todetermine the coefficients of a function, such that less complexhardware designs can be implemented. Further, the present inventionprovides apparatus, methods, and computer program products that allowindividual coefficients to be tracked and observed and also allowsindividual coefficients or subsets of coefficients to be determined withdiffering levels of resolution.

Specifically, in one embodiment, the present invention providesapparatus, methods, and computer program products that update at leastone of the coefficients of a function prior to receipt of the lastsample of the signal, such that the coefficients of the function may bedetermined with reduced latency. Further, in another embodiment, theapparatus, methods, and computer program products of the presentinvention update each of the coefficients of a function as each of thesamples of the signal are received. As discussed previously, each of thesamples of the signal affects the coefficients of the functionindependently of the other samples. The independent nature of thesamples permits the equations for each coefficient to be rearranged soas to group all of the contributions from each sample separately. Theresult is that the contributions of each sample can be computed when thesample is received and then added to each coefficient.

In light of this, in one embodiment, the present invention includes anapparatus for determining the coefficients of a function representativeof an input signal based on a predetermined plurality of samples of theinput signal. The apparatus of the present invention includes acoefficient generator that receives each of the samples one at a timeand updates at least one of the coefficients of the function prior toreceipt of the last sample.

In another embodiment, the apparatus of the present invention includes acoefficient generator that receives each of the samples one at a timeand updates the coefficients of the function based on each sample as thesample is received without awaiting receipt of all samples. Thecoefficients are thus updated each time before the arrival of the nextsample. As such, when the last sample is received, the only remainingcomputations are the determination of the contribution of the lastsample to each coefficient. Therefore, the latency from receipt of thelast sample until the coefficients are available is reduced.

In a further embodiment of the present invention, the coefficientgenerator simultaneously updates each of the coefficients with a sampleas it is received. As such, when the final sample is received, thecoefficient generator simultaneously updates each of the coefficientsand the latency between receipt of last sample and the availability ofthe coefficients is significantly reduced.

In addition to decreasing the latency between receipt of the last sampleand availability of the coefficients, the apparatus, methods, andcomputer program products of the present invention also reduce hardwareneeded for implementation. Specifically, as discussed the apparatus,methods, and computer program products of the present invention updateeach of the coefficients with the contribution of each sample as thesample is received. As such, retaining the sample after each of thecoefficients has been updated is not required, thereby reducing theamount of storage.

Further, the apparatus, methods, and computer program products of thepresent invention also decrease the time for performing computations byprecalculating at least a portion of the functions associated with eachcoefficient and storing these pre-calculated values in memory for use indetermining the coefficients for a given signal. Specifically, asdiscussed above and illustrated in Appendix 1, each of the samples isrelated to each of the coefficients by a trigonometric function, wherethe value of the trigonometric function is based on the coefficient andthe order that the sample was received in the plurality of samples. Asthe coefficient and the order in which the sample is received are knownbefore hand, the apparatus, methods, and computer program products ofthe present invention pre-calculate this portion of the trigonometricfunction for each sample and coefficient. As such, when each sample isreceived, the coefficient generator of the present invention need onlymultiply the sample by the pre-calculated value associated with thesample and coefficient.

Specifically, in one embodiment, the present invention includes anapparatus having a coefficient generator that includes a memory device.Stored in the memory device are pre-calculated values representing themathematical function associated with each sample and coefficient. Inthis embodiment of the present invention, when a sample is received, thecoefficient generator accesses the memory device and multiplies thesample by the value representing the mathematical function associatedwith the sample and coefficient to thereby define a term of thecoefficient. The coefficient generator further updates the coefficientby adding the term to the previous value of the coefficient.

In an additional embodiment, the apparatus, methods, and computerprogram products may store each of the pre-calculated values in a memorydevice that includes an array having a plurality of cells, where eachcell of the array stores a value representing the mathematical functionassociated with a respective sample and coefficient. Further, in thisembodiment, each cell of the array has a unique address, which isdesignated by the respective coefficient and sample. As such, for eachsample and coefficient, the coefficient generator of this embodiment ofthe present invention accesses the cell of the memory device using theaddress associated with the sample and coefficient, multiplies thesample by the stored value to thereby define a term of the coefficient,and thereafter updates the coefficient by adding the term to theprevious value of the coefficient.

In addition to reducing the required number of calculations byprecalculating the function associated with each sample and coefficient,in one embodiment, the apparatus, method, and computer program productof the present invention also pre-calculates all the possible values ofthe magnitude of the sample with the trigonometric function associatedwith each coefficient and sample. As such, when a sample is received,the coefficient generator need only evaluate the value of the sample andretrieve the pre-calculated value associated with the value of thesample and the mathematical function for the sample and coefficient fromthe memory device and use the pre-calculated value to update thecoefficient.

For example, in one embodiment, the present invention includes anapparatus having a coefficient generator with first and second memorydevices. The first memory device includes an array of cells with eachcell associated with a respective sample and coefficient. Each cellcontains a pre-calculated value corresponding to the combination of oneof the finite number of possible values of the sample and themathematical function associated with the respective coefficient andsample. The second memory device also has an array of cells for storingtokens. Each of the tokens represents a respective coefficient andsample.

In operation, when a sample is received, the coefficient generatoraccesses the second memory device and for each coefficient retrieves thetoken associated with the coefficient and the sample and supplies thetoken to the first memory device. Further, the coefficient generatorreceives the value of the sample and based on the token from the secondmemory device and the value of the sample, retrieves the pre-calculatedvalue stored in the cell of the first memory device that has an addresscomprised of the token and the value of the sample. The coefficientgenerator further updates the coefficient by adding the pre-calculatedvalue from the first memory device to the previous value of thecoefficient.

In another embodiment, the coefficient generator includes a multiplier,adder, divider, or other gated functions, rather than a second storagedevice. In this embodiment, the tokens are provided by the gate to thefirst memory device for addressing the cells of the first memory device.In still another embodiment, a counter is decoded with or without theuse of gates into tokens for addressing the second memory device, whichmay be conversion into values that feed a multiplier, adder, divider orother gated function, rather than a memory device.

In addition to reducing the time for calculating the coefficient basedon each sample by storing pre-calculated values, the present inventionalso provides apparatus, methods, and computer program products thatminimizes the number of values that must be stored in the memory deviceand the size of the token needed to address the first memory device.Specifically, due to the trigonometric nature of some functions, some ofthe coefficients for some samples will have a mathematical value ofzero. As the trigonometric function is dependent on the coefficient andsample number, these instances can be predetermined. Further, becausethe value for these instance is zero, there is no need to providestorage for these values in the first memory device, thereby reducingthe size of the array of the memory device and the size of the tokenneeded to address the first storage device.

Specifically, in this embodiment of the present invention, the tokenalso indicates if the value of the mathematical function associated withthe respective sample and coefficient is zero. When a sample is receivedfor which the trigonometric function for the sample and a coefficient iszero, the token associated with the sample and coefficient will soindicate. As such, when the coefficient generator accesses the tokenassociated with the sample and coefficient, the coefficient generatorwill observe the token and update the coefficient by adding a zero tothe previous value of the coefficient.

In some embodiments, the coefficient generator further includes a nulldevice, such as a pull down circuit. In this embodiment, if the tokenindicates that the mathematical function is zero, the null devicereplaces the output of the first memory device with a zero value foraddition to the coefficient.

To further minimize storage, in one embodiment, the present inventionprovides apparatus, methods, and computer program products that storesonly pre-calculated values corresponding to the combination of arespective sample and the magnitude of a respective mathematicalfunction, without accounting for the sign of the mathematical function.Specifically, due to the periodic nature of some functions, some of themathematical functions associated with the respective sample andcoefficients have the same magnitude, but different signs. In thisembodiment, of the present invention, only the magnitude of each valueis stored in the memory device. Further, the sign of the value isindicated in the token. As such, less storage is needed for the values.

In one embodiment of the present invention, the coefficient generatorfurther includes an adder in electrical connection with the output ofthe first memory device. If the token indicates that the mathematicalfunction is negative, the adder using twos-complement takes the negativeof the magnitude of the mathematical function output by the first memorydevice.

As detailed above, the present invention determines the coefficients ofthe function representative of signal by combining each sample uponreceipt with the mathematical function associated with the sample andthe coefficient. Further, as detailed above, the different combinationsof the samples and coefficients are pre-calculated and stored in anaddressable memory device. Typically, the tokens that address the cellsof the memory device have bits indicating the coefficient and bitsindicating the sample. While in the normal operation, the tokens andmemory device are used to determine the coefficients of a function thatis representative of a signal; these tokens and memory device may alsobe used to determine the coefficients of an inverse function of asignal. Specifically, in one embodiment, the coefficient generatorfurther includes a selector in electrical connection with either thegate, counter, second memory device used to generate the tokens foraddressing the first memory device. If the coefficients for an inversefunction of a signal are desired, the selector alters the addressindicated by the token such that the token addresses a cell of the firstmemory device containing a pre-calculated value representing an inversemathematical function of the signal.

As detailed above, the present invention determines the coefficients ofthe function representative of signal by combining each sample uponreceipt with the mathematical function associated with the sample andthe coefficient. Further, as detailed above, the different combinationsof the samples and coefficients may be pre-calculated and stored in anaddressable memory device or may be computed by a gated function withreference to a value associated with the token. Typically, the tokensthat address the cells of the memory device are derived from stateinformation obtained from the counter indicating the coefficient and thesample. While in the normal operation, the tokens and memory device areused to determine the coefficients of a function that is representativeof a signal, these tokens and memory devices may also be usedrepetitively by adding bits to the counter at appropriate locations andthus service a multiplicity of channels. In this embodiment, additionalcoefficient memory cells maintain the additional coefficients, and achannel number may be output as a convenience to the user. It is stillpossible employ an electrical signal to determine the forwardcoefficients or to determine the inverse function of the input.

Further, while in the normal operation, the tokens and memory device areused to determine the coefficients of a function that is representativeof a signal, these tokens and memory devices may also be usedrepetitively by adding bits to the counter at appropriate locations andthus service a multiplicity of channels. In this embodiment, additionalcoefficient memory cells maintain the additional coefficients, and achannel number may be output as a convenience to the user. By lettingconsecutive samples be treated as different channels it is possible tothus produce interleaved transforms. The interleaved transforms may besent to a second similar process to produce two-dimensional transforms,as one example.

In a further embodiment, the coefficient generator receives samples froma plurality of different signals on different channels. In thisembodiment, the coefficient generator, via the selector, may provide thecoefficients of a function representative of one signal, while alsoproviding the coefficients of an inverse function of another signal.

As detailed above, the apparatus, methods, and computer program productsof the present invention process a plurality of samples and generate thecoefficients of the function based on the samples. In some embodimentsof the present invention, after the plurality of samples have beenreceived, the apparatus, methods, and computer program products of thepresent invention output the generated coefficients, reset thecoefficients, and again take samples of the signal. In some embodiments,however, it may be advantageous to generate and output a complete set ofcoefficients as each new sample is received and processed. This isreferred to as a Sliding Aperture Fourier Transform (SAFT).

In this embodiment, the apparatus, methods, and computer programproducts of the present invention do not reset each of the coefficientsto zero after the final sample of a plurality of samples has beenreceived and the coefficients have been output. Instead, the apparatus,methods, and computer program products of the present invention replacethe first sample of the previous plurality of samples with the nextreceived sample. Using this new sample, the apparatus, methods, andcomputer program products of the present invention output a next set ofcoefficients. As such, instead of generating a set of coefficients foreach “batch” of samples, the apparatus, methods, and computer programproducts of the present invention generates a set of coefficients eachtime a new sample is received, thereby providing new set of coefficientsfor each time a new sample is received.

The present invention provides several apparatus, methods, and computerprogram products for generating a set of coefficients each time a newsample is received. In each of these embodiments, the apparatus,methods, and computer program products of the present invention replacethe first sample of the previous plurality of samples with the nextsample received and then outputs the new coefficients. For example, inone embodiment, the apparatus, methods, and computer program products ofthe present invention initially store each of the samples as they arereceived and generates a first set of coefficients when the last sampleof the plurality of samples has been received. Further, when a newsample of the input signal is received, after the predeterminedplurality of samples has already been received, the apparatus, methods,and computer program products of the present invention apply themathematical function associated with the coefficients to the sample andgenerate a term based on the new sample for each coefficient. To replacethe new sample with the first sample of the plurality of the samples,the generated term of the new sample is subtracted from the termassociated with the first sample of the predetermined plurality ofsamples that was previously stored in the memory device. Following thissubtraction, the coefficients are updated by the difference between theterms based upon the new sample and the first sample of thepredetermined plurality of samples.

In another embodiment of the present invention, to replace the newsample with the first sample of the plurality of samples, the apparatus,method, and computer program products of the present invention subtractthe term based upon a first sample of the predetermined plurality ofsamples from each of the coefficients and adds the term based upon thenew sample to each of the coefficients.

In addition to outputting coefficients for each new sample received, theapparatus, methods, and computer program products of the presentinvention also allow individual of subsets of coefficients to beobserved and tracked over time. Specifically, as stated above, thecoefficient generator of one embodiment outputs coefficients for eachnew sample. This provides a user with a new set of coefficients in realor near real-time for observance.

Further, as discussed, the apparatus, methods, and computer programproducts of the present invention update each of the coefficients of thefunction as each sample is received. As the coefficients areindividually updated, they are more readily individually available forobservance. Further, because each coefficient is updated individually,the number of updates made to each individual coefficient may be varied.As such, in one embodiment, the apparatus, methods, and computer programproducts of the present invention can vary the resolution to whicheither one or a subset of coefficients are determined by varying thenumber of samples by which they are updated relative to the othercoefficients.

In addition, the present invention also provides methods and computerprogram products for reducing the number of values that must be storedto represent the possible mathematical terms of a function.Specifically, as illustrated above, time for performing computations canbe conserved by precalculating and storing either portions of or allvalues associated with a system. However, it is often desirable toreduce the amount values that require storage to a minimum, such thatstandard memory devices may be used.

In one embodiment, the present invention provides methods and computerprogram products that initially generate a first list of all possiblemathematical terms of the function. For each mathematical term, themethod and computer program product systematically compare eachmathematical term in the list to all other mathematical terms in thelist to determine which of the mathematical terms are redundant.Further, the unique mathematical terms of the function are stored in asecond list all of the unique mathematical terms of the function, suchthat there are no redundant mathematical terms of the function in thesecond list.

In one embodiment of the present invention, the function is at leastperiodic or reversing such that some of the mathematical terms of thefunction have the same magnitude and different signs. In thisembodiment, the method and computer program product of the presentinvention compare the magnitude of each mathematical term in the list tothe magnitude of each of the other mathematical terms in the list todetermine which of the mathematical terms have the same magnitude.Further, the mathematical terms having unique magnitudes are stored inthe second list. The method and computer program product of the presentinvention further includes creating a token associated with eachmathematical term, where the token indicates the magnitude stored in thesecond list associated with the mathematical term and the signassociated with the mathematical term.

In another embodiment of the present invention, at least one of themathematical terms has a magnitude of zero. In this embodiment, themethod and computer program product create a token associated with themathematical term indicating that the mathematical term is zero suchthat the mathematical term is not stored in the second list.

In another embodiment, the function is representative of a signal and isdefined by samples of the signal, where a sample of the signal is one ofa finite number of possible values. In this embodiment, the method andcomputer program product generate the first list of all possiblecombinations of the possible values of the sample and the mathematicalterms of the function. Further, each combination in the list issystematically compared to all other combinations in the list todetermine which of the combinations are redundant. Based on thiscomparison, all of the unique combinations are stored in the secondlist, such that there are no redundant combinations in the second list.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on asample of the input signal using gate devices according to oneembodiment of the present invention.

FIG. 2 is a block diagram of the operations performed to determine thecoefficients of a function representative of an input signal based on asample of the input signal according to one embodiment of the presentinvention.

FIG. 3 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on asample of the input signal using at least one memory device according toone embodiment of the present invention.

FIG. 4 is a block diagram of the operations performed to reduce thenumber of values that must be stored to represent the possiblemathematical terms of a function according to one embodiment of thepresent invention.

FIG. 5 is a graphic representation of the plot of coefficientsdetermined using a Fourier Transform.

FIG. 6 is a block diagram of the operations performed to create a tableof tokens, where each token represent a value of the function accordingto one embodiment of the present invention.

FIG. 7 is a block diagram of the operations performed to create a tableof addressable values according to one embodiment of the presentinvention.

FIG. 8 is a block diagram of the operations performed to retrieve valuesfrom a table based on tokens according to one embodiment of the presentinvention.

FIG. 9 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on asample of the input signal using memory devices and gates according toone embodiment of the present invention.

FIG. 10 is a block diagram of the operations performed to determine thecoefficients of a function representative of an input signal based on asample of the input signal using memory devices and gates according toone embodiment of the present invention.

FIG. 11 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal according to one embodiment ofthe present invention.

FIG. 12 is a block diagram of the operations performed to determine thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal according to one embodiment ofthe present invention.

FIG. 13 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal using memory devices and gatesaccording to one embodiment of the present invention.

FIG. 14 is a block diagram of the operations performed to determine thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal using memory devices and gatesaccording to one embodiment of the present invention.

FIG. 15 is a block diagram of an apparatus for determining thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal using memory devices and gates,where for each sample received a set of coefficients are outputaccording to one embodiment of the present invention.

FIG. 16 is a block diagram of the operations performed to determine thecoefficients of a function representative of an input signal based on aplurality of samples of the input signal using memory devices and gates,where for each sample received a set of coefficients are outputaccording to one embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention now will be described more fully hereinafter withreference to the accompanying drawings, in which preferred embodimentsof the invention are shown. This invention may, however, be embodied inmany different forms and should not be construed as limited to theembodiments set forth herein; rather, these embodiments are provided sothat this disclosure will be thorough and complete, and will fullyconvey the scope of the invention to those skilled in the art. Likenumbers refer to like elements throughout.

As discussed above, data processing systems have been developed fordetermining the coefficients of a function that is representative of asignal. However, because many of these systems are complex and do notcalculate the coefficients until all samples of the signal have beenreceived, these systems do not provide immediate analysis of the signal.Further, because these conventional systems are complex, the individualcoefficients are not readily accessible for observance and tracking.Further, these systems do not allow variation in the resolution ofindividual or selected subsets of coefficients.

The present invention, on the other hand, provides apparatus, methods,and computer program products that can decrease the latency with whichthe coefficients of a function representative of signal are determined.Specifically, the apparatus, methods, and computer program products ofthe present invention, taking advantage of the independence of samples,updates at least one of the coefficients prior to receipt of the lastsample, such that the latency in determining the coefficients isreduced.

Further, in another embodiment, the apparatus, methods, and computerprogram products of the present invention update each of thecoefficients of the function as each sample is received. As such, whenthe final sample is received, the apparatus, methods, and computerprogram products of the present invention need only update eachcoefficient with the contribution of the last sample prior to outputtingthe coefficients. As such, the latency from the time the last sample isreceived and the availability of the coefficients is decreased.

To further decrease the latency, in one embodiment, the apparatus,methods, and computer program products of the present invention prestoreeither all or a portion of the possible values of the contribution of asample to each coefficient. As such, when the sample is received, andespecially the last sample, the apparatus, methods, and computer programproducts of the present invention evaluate the value of the sample andretrieve the appropriate value from the prestored values thatcorresponds to the coefficient, sample, and value of the sample, therebydecreasing the time required to determine the coefficients. Stillfurther, in another embodiment, the apparatus, methods, and computerprogram products of the present invention update each of thecoefficients simultaneously. As such, when the last sample is received,the coefficients are updated simultaneously with the contribution of thelast sample, and all of the coefficients are output.

The apparatus, methods, and computer program products of the presentinvention also allow individual or subsets of the coefficients to beobserved and also allows individual or subsets of the coefficients to bedetermined in varying resolutions. Specifically, as stated, theapparatus, methods, and computer program products of the presentinvention update each of the coefficients as each sample is received. Assuch, each sample is available for output when desired. Further, becausethe apparatus, methods, and computer program products of the presentinvention update each coefficient independent of the other coefficients,each coefficient can be updated to different resolutions. For example,one coefficient of interest may be updated with every sample, whileanother coefficient is only updated with every third sample.

The apparatus, methods, and computer program products of the presentinvention may also reduce the amount and size of hardware needed toimplement the processing system. Specifically, as stated, when a sampleof the signal is received, the apparatus, methods, and computer programproducts of the present invention immediately update each of thecoefficients with the contribution of the sample. As the samples areindependent of each other, the sample is no longer needed after thecoefficients have been updated with its contribution, and as such, thesample may be discarded. By discarding the sample after use, theprocessing system does not require additional memory storage for storingthe samples or additional processing for retrieving the data.

The present invention also provides methods and computer programproducts for reducing the number of values that must be stored torepresent the possible mathematical terms of a function. Specifically,the method and computer program product of this embodiment of thepresent invention compares each of the possible mathematical terms of afunction to the other mathematical terms. From this comparison, themethod and computer program products reduce the number of values thatshould be stored. For example, in one embodiment, the mathematicalfunction may be periodic, such that different values of the functionhave the same magnitude, but different signs. In this instance, themethod and computer program product of the present invention would onlystore the magnitude of the terms and use a token to represent the sign.In another embodiment, there may be values of the function that arezero, (e.g., cos(π/2) and sin π=0). In this embodiment, the method andcomputer program products do not store the value of zero, but insteaduse a token representing that the value is zero.

For illustrative purposes, the various apparatus, methods, and computerprogram products of the present invention are illustrated and describedbelow in conjunction with the characteristics of Fourier Series. Itshould be apparent, however, that the apparatus, methods, and computerprogram products of the present invention can be used with manydifferent types of functions. For instance, the apparatus, methods, andcomputer program products may be used with functions such as Besselfunctions, Legendre Polynomials, Tschebysheff Polynomials of First andSecond Kind, Jacoby Polynomials, Generalized Laguerre Polynomials,Hermite Polynomials, Bernoulli Polynomials, Euler Polynomials, and avariety of Matrices used in Quantum Mechanics, Linear Analysisfunctions, wavelets and fractals. This list is by no means exhaustiveand is provided as mere examples. The approach may be applied to anyfunction that can be expressed as a sequence of values. The usefulnessof the application of these and other functions not listed above isquite general. This method provides a way to develop apparatus andmethods for parallel computing and remove redundancy in a rote manner,which is compatible with machine execution. One implementation of thepresent invention would be in a general purpose computer program toexamine each class of problem an write a minimal execution program ordesign an apparatus for the same function. In this application, it wouldbe a programming aid.

As discussed above with reference to Appendix 1, an important concept ofthe present invention is the independence of the samples used todetermine the coefficients of a function. The independence of samplescan be illustrated in the context of Fourier Transforms. The FourierTransform is based on the principle of orthogonality. As a FourierTransform is applied in the DFT, it provides a means to evaluate theamplitude of the components of each frequency of a signal totallyindependently. The frequencies used in the computation are consecutiveintegral multiples of the base frequency. The base frequency is the timeperiod required to take one set of samples. The samples of the signalare multiplied by each member of the set of orthogonal functions andsummed for one or a plurality of cycles of the base frequency. Eachresulting coefficient is the amplitude of the real or imaginary part ofone test frequency. Importantly, the computation of a coefficient isindependent of the computation of the other coefficients. In a set ofsamples N, that are transformed by the DFT, each sample contributes toeach coefficient of the function based on either the sine or cosine ofthe applicable angle and normalization constants. The general equationsfor a Discrete Fourier Transform are provided below: $\begin{matrix}{{n:=0},{1\quad\ldots\quad\infty}} & \quad & \quad & \quad & {a_{n}:={\frac{1}{L} \cdot {\int_{- L}^{L}{{{f(x)} \cdot \cos}\quad\left( \frac{n \cdot \pi \cdot x}{L} \right)\quad{\mathbb{d}x}}}}}\end{matrix}$ $\begin{matrix}{{n:=1},{2\quad\ldots\quad\infty}} & \quad & \quad & \quad & {b_{n}:={\frac{1}{L} \cdot {\int_{- L}^{L}{{{f(x)} \cdot \sin}\quad\left( \frac{n \cdot \pi \cdot x}{L} \right)\quad{\mathbb{d}x}}}}}\end{matrix}$${f(x)}:={\frac{a_{0}}{2} + \left\lbrack {\sum\limits_{n = {- \infty}}^{\infty}\left( {{{a_{n} \cdot \cos}\quad\left( \frac{n \cdot \pi \cdot x}{L} \right)} + {b_{n} \cdot {\sin\left( \frac{n \cdot \pi \cdot x}{L} \right)}}} \right)} \right\rbrack}$

With reference to Appendix 1, the determination of the coefficients of afunction using conventional DFT is illustrated. Initially, the DFTreceives a preselected set of samples of a signal, (in this exampleN=8). The DFT next calculates all of the coefficients, (A₀, A₁, A₂, A₃,A₄, B₁, B₂, B₃, and B₄) one at a time. The value of each sample is usedone time in the computation-of the coefficients. Each sample ismultiplied by both the sine and cosine of the independent variableassociated with each coefficient times a normalized rate. For example,the coefficient A1 is the summation A1₁+A1₂+ . . . A1₈, which are theapplication of each sample to the cosine function associated with the A1coefficient. As each of the samples are related to each coefficient byaddition, each sample is independent of the other samples and can beused to update the coefficients prior to receipt of the other samples.

In light of this independence of samples, the apparatus, methods, andcomputer program products of the present invention rearrange the termsas shown in Appendix 2, such that each of the coefficients are updatedas each of the samples of the signal are received. This is differentfrom the conventional method of Appendix 1, which is a batch method thatawaits until all samples have been received before calculating thecoefficients. As described above and detailed below, by updating each ofthe coefficients as each sample is received, the apparatus, methods, andcomputer program products of the present invention can reduce latency ingeneration of the coefficients, allow individual coefficients to betracked or observed, and determine the coefficients with differentresolutions.

With reference now to FIG. 1, one embodiment for determining thecoefficients of a function representative of an input signal based onsamples of the input signal, according to the method illustrated inAppendix 2, is shown. The apparatus of this embodiment of the presentinvention includes a coefficient generator 10. The coefficient generatorincludes a receiver 12 for receiving samples of an input signal. Thecoefficient generator also includes a first gate 14 in electricalcommunication with the receiver and a second gate 16 in electricalcommunication with the first gate.

With reference to FIG. 2 and Appendix 2, the operation of thecoefficient generator is illustrated. In this illustration, thecoefficient generators generates the coefficients based on N=8 samplesof the signal. For each sample, the receiver receives a sample of thesignal and inputs the sample to the first gate 12. (See step 100). Foreach coefficient, the second gate receives two values, one 18representing the number of the coefficient and the other 20 representingthe sample number. Based on the coefficient number and the samplenumber, the second gate generates the orthogonal function portion of thesignal. (See step 110).

For example, as shown in Appendix 2, for the zeroth coefficient A0, thesample value is added to the coefficient, (i.e., A0+A0₁). For the firstsample and coefficient A1₁, the orthogonal function is:cos(2πC_(n)S_(n)/N)where:

C_(n)=coefficient number;

S_(n)=sample number; and

N=number of samples.

To calculate the term for the first coefficient and first sample, thesecond gate receives the coefficient number 18 and the sample number 20.Based on this, for the first sample S_(n) and the first coefficientC_(n), the second gate generates cos(2π·1·1/8) or cos(2π/8) and outputsthis value to the first gate. (See step 110).

The first gate, in turn, receives the value from the second gate and thevalue of the sample from the receiver. Based on these values, the firstgate generates a term representing the contribution of the sample to thecoefficient, (i.e., S₁ cos(2π/8)). (See step 120). This term is thenadded to the coefficient A1, (i.e., A1+A1₁). (See step 130). This isrepeated for each coefficient. (See steps 140 and 150).

The discussion above illustrates the updating of each coefficient one ata time with each sample. However, it must be understood that thecoefficient generator could only update one of the coefficients prior toreceipt of the last coefficient and thereby decrease the latency indetermining the coefficients. Further, it must be understood that thecoefficient generator could update all of the coefficients with eachsample simultaneously. For example, the coefficient generator couldcontain a plurality of first and second gates all connected to thereceiver. In this embodiment, the sample is supplied to each set ofgates simultaneously, and each set of gates, in turn, generates the termfor each coefficient representing to the contribution of the sample toeach coefficient simultaneously, and each coefficient is updatedsimultaneously. This is referred to as parallelism and is advantageousas it allows all coefficients to be updated simultaneously. Parallelismis the typical application of the coefficient generator. Specifically,the coefficient generator is typically implemented to update allcoefficients simultaneously. Further, in some instance, the coefficientgenerator is configured to received inputs from several channels, forwhich the coefficient generator generates a set of coefficients for eachchannel. However, in many of the embodiments below, the coefficientgenerator is illustrated as updating each coefficient sequentially andwith only one channel for sake of clarity.

FIG. 1 illustrates the determination of the coefficients based on theuse of gates, such as multipliers, adders, dividers, or other gatedfunctions. FIG. 3 illustrates the determination of the coefficientsusing at least one memory device. Use of memory devices, as opposed, togates may be advantageous as many of the values that must be calculatedto determine the coefficients may be prestored in the memory devices.This, in turn, may save time in determining the coefficients.

With reference to FIG. 3, the coefficient generator of this embodimentincludes a receiver 12 for receiving samples of a signal. Thecoefficient generator also includes a first memory device 22 inelectrical communication with the receiver and a second memory device 24in electrical communication with the first memory device. In oneembodiment of the present invention, the second memory device includesan array of cells, where each cell contains a pre-calculated valuerepresenting the orthogonal function portion of the signal for eachsample and coefficient. For example, the second memory device includes acell for the orthogonal function portion of the signal for the firstsample and coefficient equal to cos(2C_(n)S_(n)/N) or cos(2π/8). In thisembodiment, the first memory device may be a multiplier.

With reference to FIG. 2 and Appendix 2, in operation in thisembodiment, for each sample, the receiver receives a sample of thesignal and inputs the sample to the first memory device 22. (See step100). For each coefficient, the second memory device receives a tokenrepresenting the address of the cell containing the orthogonal functionportion of the signal for the sample and coefficient. This token isprovided by the inputs, 18 and 20, where one portion of the token is thecoefficient number C_(n) and the other portion is the sample numberS_(n). Based on the token, the second memory device retrieves the valueassociated with the coefficient and sample and outputs the value to thefirst memory device. (See step 110). The first memory device, in turn,receives the value from the second memory device and the value of thesample from the receiver. Based on these values, the first memory devicegenerates a term representing the contribution of the sample to thecoefficient, (i.e., S₁ cos(2π/8), for the first sample and coefficient).(See step 120). This term is then added to the coefficient, (i.e.,A1+A1₁). (See step 130). This is repeated for each coefficient. (Seesteps 140 and 150).

In some embodiments of the present invention, the sample received fromthe receiver is one of a number of finite values. Since the orthogonalfunction portion for each sample and coefficient is previously known,(i.e., (2πC_(n)S_(n)/N)), and the sample can only be one of a finitenumber of values, values representing each sample value, sample number,and coefficient number can be pre-calculated and prestored. As such,when a sample is received, the term representing the sample'scontribution to each coefficient can be determined by looking up thevalue in the memory device based on the value of the sample, samplenumber, and coefficient number.

In light of this, in one further embodiment, the first memory device isa memory device containing an array of cells. Each cell of the firstmemory device includes a pre-calculated value representing each samplevalue, sample number, and coefficient number. For each coefficient andsample, the memory device contains a group of cells, each having theorthogonal function associated with the coefficient and samplemultiplied by a possible value for the sample. For example, for thefirst sample and coefficient, there are a group of cells having a valueof S₁ cos(2π/8), where each cell represents the value for a differentpossible value of S₁. Additionally, the second memory device has anarray of cells each having a token representing the orthogonal functionportion for each sample and coefficient.

In operation, with reference to FIG. 2, for each sample, the receiverreceives a sample of the signal and inputs the sample to the firstmemory device 22. (See step 100). For each coefficient, the secondmemory device receives from the inputs, 18 and 20, values representingthe address of the cell containing the token representing the orthogonalfunction portion of the signal for the sample and coefficient. Thesecond memory device retrieves the token associated with the coefficientand sample and outputs the token to the first memory device. (See step110). The first memory device, in turn, receives the token from thesecond memory device and the value of the sample from the receiver.Based on the token and the value of the sample, the first memory devicelooks up the cell in the array corresponding to these values and outputsa term representing the contribution of the sample to the coefficient,(i.e., S₁ cos(2π/8), for the first sample and coefficient). (See step120). This term is then added to the coefficient, (i.e., A1+A1₁). (Seestep 130). This is repeated for each coefficient. (See steps 140 and150).

Again, it must be understood that the apparatus of this embodiment mayoperate in a parallel configuration to update each coefficientsimultaneously by providing a plurality of first and second memorydevices for each coefficient that are all connected to the receiver. Inthis embodiment, each first and second memory device receives the samplesimultaneously and is addressed appropriately such that each set offirst and second memories address values for the different coefficients.Thus, the contribution of the sample to each coefficient is determinedin parallel and simultaneously.

With reference to FIG. 3, in one additional embodiment, the coefficientgenerator may include a counter 26 in electrical communication with thesecond memory device 24. The counter may be incremented by a clock, notshown, that is timed to allow calculations to be made. The counter mayinclude two outputs, 18 and 20, which represent the coefficient numberand sample number for addressing the second memory device. In operation,for each sample, the sample number is held constant, while for eachcycle or plurality of cycles of the clock, the counter increments thecoefficient number. This, in turn, addresses the second memory devicefor determining the contribution of the sample to each coefficient.After, all of the coefficients have been calculated for that sample, thesample number of the counter is incremented, and the coefficient numberis reset, such that the next sample is now evaluated for eachcoefficient.

As detailed above, to reduce time for calculations, one embodiment ofthe present invention uses memory devices to store pre-calculated valuesand tokens to address the memory devices. An important concern in manyelectronic designs is the desire to minimize the number of componentsneeded to operate the circuit and also the need to use off-the-shelfcomponents wherever possible. In light of this, methods are needed thatevaluate the need aspects of a design and determine design solutionsthat minimize the number of components and allow for the use of standardcomponents.

As such, the present invention provides methods and computer programproducts for reducing the number of values that must be stored torepresent the possible mathematical terms of a function. This method isillustrated with reference to FIG. 4 and an example of a method ofreducing the number of values that must be stored in the memory deviceof the coefficient generator is shown in FIG. 3.

With reference to FIG. 4, first an empty list is created, (see step200), and all possible mathematical terms of a function are stored in amatrix. (See step 210). For example, in many mathematical functions,such as a Fourier Series, a specific array of values must be multipliedby a set of data. If the data is N-bit binary numbers and there are Mnumbers in the array, the number of possible products that might beformed is two to the power of N times M, (2^(N×M)). For example, if aFourier Series is based on 64 samples to generate 64 coefficients, thereare 4096 trigonometric functions to be evaluated and multiplied by thesamples. If the samples are each 12 bits in length, there are 4906possible sample values. To pre-calculate and store the product of eachof the possible sample values times the value of the trigonometricfunction for all 4096 possible sample values would require 16,777,216stored products, which would require a rather large memory device.

With reference to FIG. 4, to reduce the number of stored values, themethod and computer program product of the present-invention place allthe possible values in a matrix, (see step 210), and systematicallycompares each mathematical term in the list to all other mathematicalterms in the list to determine which of the mathematical terms areredundant. (See steps 220 and 240). If the value is unique, it is storedin the generated list. (See step 250). This repeated for all values,(see step 260), and the total number of values is output. (See step270).

For example, for the Fourier Series, because of the properties of sineand cosine, there are only 32 different actual values required to bestored. This analysis is based on an evaluation of the sine and cosinefunctions that are typically used in Fourier Transforms. Specifically,FIG. 5 illustrates two graphs plotting 4096 evaluations of sine andcosine for the coefficients of a Fourier Transform using 64 samples and64 coefficients. These graphs illustrate that there is only a finite setof values. This analysis is based on the fact that each value is relatedto a polarity, plus or minus. If the plus or minus of the values aresignified by tokens, the absolute value of the functions are all thatneeds to be stored. In doing so, the requirement for memory can bereduced from 256K to 128K.

The number of values stored can also be reduced if the incoming samplevalue code representing the value of the sample is in a signed form,(i.e., positive or negative), about zero so that there is one sign bitand the remaining 11 bits are the absolute value of the 12 bit input. An11 bit number only requires half as many memory locations for storage as12 bits. As such, the size of the memory can be reduced to 64K bytransforming the 12 bit value into an 11 bit value and a 1 bit sign andhandling the sign bit in some logic, which can similarly support thetokens.

As discussed there are 32 different values, which require 32 differenttokens that must be stored. If the number of tokens could be reduced to16, then there would be 16 values times 2048. possible sample value,which is 32K. This can be accomplished by observing that one of thevalues is zero and all 4096 values associated with it become zero.Instead, of providing tokens for the zero values, the token itself cancontain a bit dedicated to zero. As such, a set of 16 tokens can beused, where 4 bits are the address, a sign bit to represent the sign ofthe value, and a zero bit to represent when the value is zero.

As illustrated, the method and computer program products of the presentinvention can be used to reduce the number of values that must bestored. This, in turn, allows for the use of minimum and standardhardware. For example, in the above example where 64 samples of a signalare taken using a 12 bit sample code, the first memory device forstoring all of the pre-calculated values can be reduced to a 128Kmemory, and the second memory for storing the tokens can be reduced toan 8K memory.

Although the method and computer program products of the presentinvention for reducing the number of stored values are illustrated inthe context of a Fourier Series with a predecribed number of samples andsample bit size, it must be understood that the methods and computerprogram products for reducing the number of required values that must bestored can be used with any function, number of prescribed samples,and/or sample bit size.

After the number of stored values has been determined, the values shouldbe addressed with tokens that are stored in the second memory device.With reference to FIG. 6, to create addresses/tokens for storage, themethod initially applies an address to a value, (see steps 300 and 310).A token related to the address is then selected. (See step 320). Themethod next checks to see if all values have been addressed. (See step330). If not, the method increments the address in any order, (see step340). Once all values have been addressed, they are loaded into memory.(See step 350). Similarly, once a set of values is known for the tokens,it is common to find an arrangement of adders or other gating thatreplaces the table with the same response to each address and a savingin the number of transistors or whatever measure is most meaningful inthe technology being implemented. This is called a gated function ratherthan a table.

With reference to FIG. 7, in addition to creating and storing tokens,the pre-calculated values should also be loaded into the first memorydevice. Specifically, for each possible sample value, the method andcomputer program products of the present invention, takes a first tokenand applies the value of the token and a possible value of the sample tothe function to create a pre-calculated value of the function for thesample value. (See step 400 and 410). The pre-calculated value is thenstored in memory. (See step 420). The method next checks to see if allvalues have been addressed. (See step 430). If not, the methodincrements the address in any order, (see step 440). Once all valueshave been addressed, they are loaded into memory. (See step 450).Similarly, once a set of values is known for the tokens, it is common tofind an arrangement of multipliers or other gating that replaces thetable with the same response to each address and a saving in the numberof transistors or whatever measure is most meaningful in the technologybeing implemented. This is called a gated function rather than a table.

FIG. 3, described above, illustrates use of memory devices and tokens todetermine the coefficient of a function. FIG. 8, however, illustrates amore general use of the memory devices and tokens developed above inFIGS. 4, and 6-7. Specifically, to use the memory device and tokens todetermine a value, the address representing a desired token is appliedto the second memory device, (see step 500), and the token is retrieved.(See step 510). The token is then applied to the first memory device,along with the value of the sample to create the address for accessingthe first memory device. (See steps 520 and 530). If the token includesa sign bit or zero bit that are set, the value associated with token inthe first memory device is altered appropriately. (See step 540).Finally, the value is output. (See step 550).

As discussed above, the number of values that must be stored tocalculate the coefficients of function can be decreased by removingredundant values, storing only the magnitude of the values, and usingtoken bits to signify when a value is zero or the sign of a value. FIG.9 provides an illustrative embodiment for determining the coefficientsof a function using a first memory device having the minimum number ofvalues stored, a second memory device with tokens that include bits forindicating sign and zero, and a signed input value. As with the previousembodiment, the coefficient generator 10 of this embodiment includesfirst and second memory devices, 22 and 24. Both of the memory devicesinclude arrays of cell for storing values. The second memory deviceincludes tokens representing the coefficient and sample number, and thefirst memory device includes all of the possible unique values of thesample combined with the orthogonal function portion for each sample andcoefficient. For example, for the first sample S₁ and second coefficientC₁, the token stored in the second memory device designates the samplenumber and coefficient number, S₁ and C₁. Stored in the first memorydevice is a number of cells each having a value defined by the equation(S₁ cos(2πC_(n)S_(n)/N) or (S₁ cos(2π/N)), with each cell storing theapplication of a possible value of the sample Si to the equation.

Additionally, the coefficient generator of this embodiment also includesa first AND gate 28 in electrical communication with the receiver 12,the output of the second memory device, and an input of the first memorydevice. The coefficient generator also includes a second AND gate 30connected to the output of the first AND gate 28 and an XOR gate 32.Connected to the output of the second AND gate 30 is an adder 36,typically implemented so as to take the twos complement of a signal. TheXOR gate 32 is in electrical communication with the output of the secondmemory device and a gate combination 40 to be discussed later. Thecoefficient generator of this embodiment also includes a null device orpull down 34 in electrical communication with the output of the firstmemory device.

Importantly, to reduce the number of values that must be stored, thesample received by the receiver is in a 12 bit code, where one of thebits is a sign bit. As discussed, by reducing the bit representation ofthe sample to 11 bits and using one bit for the sign, storage space isreduced. To this end, in some embodiments, the coefficient generatoralso includes a code converter 38 in electrical communication with thereceiver 12. If the sample output by the receiver is not in the proper12 bit format, the code converter will convert the sample into a 12 bitvalue having 11 bits representing the value and 1 bit for the sign.

The coefficient generator of this embodiment also uses a 6 bit tokenstored in the second memory device to address the values stored in thefirst memory device. Importantly, to decrease the number of values thatmust be stored, one of the bits represents the sign of the number andone of the bits represents whether the value is zero. The tokens operatein conjunction with the second AND gate 30 and adder 36 to take thenegative of the output of the first memory device, if the sign bit ofthe token indicates the negative of the value. Further, the null or pulldown device 34, the zero bit of the token, and the AND gate 28 operateto null or zero the output of the first memory device, if the tokenindicates that the value should be zero.

With reference to FIG. 10, in operation in this embodiment, for eachsample, the receiver receives a sample of the signal and inputs thesample to the first memory device 22. (See step 600). For eachcoefficient, inputs, 18 and 20, are provided to the second memory devicerepresenting the sample number and coefficient number. (See step 610).Based on the inputs, the second memory device outputs a token having 4bits representing the sample and coefficient number, 1 bit representingwhether the value is negative, and 1 bit representing whether the valueis zero or not. (See step 620). The first memory device, in turn,receives the token from the second memory device and the value of thesample from the receiver. Based on these values, the first memory devicegenerates a term representing the contribution of the sample to thecoefficient, (i.e., S₁ cos(2π/8), for the first sample and coefficient).(See step 630).

Additionally, the sign bit of the sample and the output of the sign bitof the token are supplied to the second AND gate 30. If either the signof the signal is negative or the sign bit of the token is set, thesecond AND gate outputs a carry bit to the adder 36. The adder will makethe output of the first memory device negative. (See steps 640 and 650).

Likewise, the token and the signal are both provided to the first ANDgate 28. If either the signal or the token indicates a zero value, azero value is output by the first AND gate 28. The zero value is sent tothe second AND gate 30, which prohibits the second AND gate 30 fromnegating the signal. Further, a zero value is output to the first memorydevice, which disables the first memory device. Due to the disablementof the first memory device, the null or pull down device 34 outputs azero value representing the value of the coefficient. (See steps 660 and670). The term of the coefficient is then output. (See step 680).

As illustrated in FIG. 9, in one embodiment, the coefficient generatorfurther includes a counter 26 in electrical communication with thesecond memory device. The counter may be incremented by a clock, notshown, that is timed to allow calculations to be made. The counter mayinclude two outputs, 18 and 20, which represent the coefficient numberand sample number for addressing the second memory device. In operation,for each sample, the sample number is held constant, while for eachcycle or plurality of cycles of the clock, the counter increments thecoefficient number. This, in turn, addresses the second memory devicefor determining the contribution of the sample to each coefficient.After all of the coefficients have been calculated for that sample, thesample number of the counter is incremented, and the coefficient numberis reset, such that the next sample is now evaluated for eachcoefficient.

Further, and importantly, FIG. 9 also illustrates another aspect of thepresent invention. As discussed above, the apparatus, methods, andcomputer programs products of the present invention determine thecoefficients of a function representative of an input signal based on apredetermined plurality of samples of the input signal. However, theapparatus, methods, and computer program products may also determine thecoefficients representing an inverse function of the signal. Forexample, many data processing systems are equipped to perform both a DFTand an inverse DFT of the signal.

The inverse DFT is essentially performing the DFT in the reverse sense.As the first memory device includes all of the possible values of theDFT, the inverse DFT can be determined by merely addressing the valuesin the first memory device that correspond to the values of the inverseDFT. With reference to FIG. 9, to implement an inverse DFT, thecoefficient generator further includes a third gate 40 having and XORand NOT gate. The third gate has inputs connected to the sign bit of the12 bit signal and an input for indicating when to perform an inversefunction 44. The output of the third gate is connected to XOR gate 32,along with the output of the second memory device. Further, thecoefficient generator also includes a selector or crossbar 42 inelectrical communication with the inputs, 18 and 20, to the secondmemory device. The crossbar is also connected to the input 44 indicatingwhether perform an inverse function.

In operation, the inverse function, (e.g., inverse DFT), operatessimilar to the operation to determine the function (e.g., DFT), asdiscussed in FIG. 10. Except that the selector or crossbar switches theaddress input lines to the first memory device. Specifically, if thecoefficients for an inverse function of a signal are desired, theselector alters the address indicated by the token such that the tokenaddresses a cell of the first memory device containing a pre-calculatedvalue representing an inverse mathematical function of the signal.Further, the third gate 40 operates in conjunction with the second ANDgate 30 to negate the signal when either the mathematical function orinput signal are negative. As such, the apparatus, methods, and computerprogram products of the present invention can determine the function orthe inverse function using the same components and stored values, merelyby switching the values that are addressed to perform the inversefunction.

As provided above, the apparatus, methods, and computer program productsof the present invention determine the coefficients of a functionrepresentative of a signal by updating each coefficient as each sampleis received. FIGS. 1, 3, and 9 illustrate the updating of thecoefficients for one sample. FIG. 11, discussed in detail below,illustrates the determination of the coefficients based on a pluralityof samples, and in particular, illustrates the updating of eachcoefficient for each sample received.

Similar to previous embodiments, the coefficient generator 10 of thisembodiment includes first and second memory devices, 22 and 24. Both ofthe memory devices include arrays of cells for storing values. Thesecond memory device includes tokens representing the coefficient andsample number, and the first memory device includes all of the possibleunique values of the sample combined with the orthogonal functionportion for each sample and coefficient. Although any system or devicemay be used for addressing the second memory device, the presentembodiment illustrates a counter 26 to address the second memory device.

The coefficient generator of this embodiment further includes an adder44 in electrical communication with the output of the first memorydevice. Connected to the adder 44 is a crossbar 46 and a third memorydevice 48. The coefficient generator also includes a null or pull downdevice 50 in electrical communication with the crossbar, and an ANDgates, 52 and 54, connected to the output of the counter.

With reference to FIG. 11, in operation in this embodiment, for eachsample, the receiver receives a sample of the signal and inputs thesample to the first memory device 22. (See step 700). For eachcoefficient, inputs, 18 and 20, are provided to the second memory devicerepresenting the sample number and coefficient number from the counter.(See step 710). Based on the inputs, the second memory device outputs atoken. (See step 720). The first memory device, in turn, receives thetoken from the second memory device and the value of the sample from thereceiver. Based on these values, the first memory device generates aterm representing the contribution of the sample to the coefficient.(See step 730). The term is next provided to the adder 44, which alsoreceives the previous value of the coefficient from the third memorydevice 48. The third memory device is also connected to the secondmemory device. The token from the second memory device addresses thecoefficient stored in the third memory device, which, in turn, is outputto the adder for adding to the term. The term is added to the existingcoefficient by the adder. (See step 740).

After, the coefficient is updated, the coefficient generator nextdetermines whether the last sample has been processed. (See step 750).Specifically, the AND gate 52 is connected to the six most significantbits of the counter, which designate the sample number. If the samplenumber is the last sample number of the set, (in this case the 64thsample), the six most significant bits of the counter will be all ones.When all ones are input in to the AND gate 52, the AND gate outputs aone indicating that the last sample has been received.

If the last sample has not been received, the crossbar 46 directs theupdated coefficient from the adder 44 to the third memory device 48,where the updated coefficient is stored. (See step 760). The null orpull down device 50 also outputs a zero on the output indicating thatthe coefficients have not been calculated.

On the other hand, if the last sample has been received, the crossbar 46directs the updated coefficient from the adder 44 to the output. (Seestep 770). Further, the null or pull down device 50 is directed by thecross bar to zero or null the value stored in the third memory device asa reset. Further, the AND gate 54 indicates that the coefficient valueoutput is a valid value, instead of zero.

The above steps are repeated for each coefficient until all of thecoefficients have been updated with the sample. (See step 780 and 790).Further, the process is repeated for each sample, until all samples arereceived and each coefficient is updated. (See step 795).

FIG. 11 also illustrates another aspect of the present invention.Specifically, in. one embodiment, the coefficient generator of thepresent invention is connected to a plurality of signal channels, suchthat the coefficient generator determines coefficients for functionsrepresenting signals located on each channel. In this embodiment, thecounter also outputs a count value indicating the channel for which thecoefficient generator is currently processing a signal. The channelnumber and coefficient number are output on lines, 56 and 58. Thecoefficient generator operates similar to the previous embodiments.Specifically, the coefficient generator is first connected to the firstchannel, where it receives a sample and updates the coefficientsassociated with the first channel. The coefficient generator goes toeach channel and receives a sample and updates the coefficientsassociated with the signal on that channel. This is repeated until allof the samples for all channels have been received and the coefficientsfor the signal on each channel have been updated. In another embodiment,the coefficient generator may receive and process all the samples forone channel before switching to the next channel.

As discussed previously, it sometimes advantageous to reduce the amountof data that must be stored by eliminating redundant values, storingonly the magnitude of the values, and using tokens to designate sign orwhether the value is zero. As such, FIG. 13 illustrates the coefficientgenerator of FIG. 11 with the addition of gates to reduce the amount ofvalues that must be stored. Specifically, similar to the previousembodiment, the coefficient generator 10 of this embodiment includesfirst and second memory devices, 22 and 24. Both of the memory devicesinclude arrays of cell for storing values. The second memory deviceincludes tokens representing the coefficient and sample number, and thefirst memory device includes all of the possible unique values of thesample combined with the orthogonal function portion for each sample andcoefficient. Although any system or device may be use for addressing thesecond memory device, the present embodiment illustrates a counter 26 toaddress the second memory device.

The coefficient generator of this embodiment further includes an adder44 in electrical communication with the output of the first memorydevice. Connected to the adder 44 is a crossbar or selector 46 and athird memory device 48. The coefficient generator also includes a nullor pull down device 50 in electrical communication with the crossbar,and a NAND gate 52 and AND gate 54, connected to the output of thecounter.

Additionally, the coefficient generator of this embodiment also includesa first AND gate 28, a second AND gate 30, and an XOR gate 32. Connectedto the output of the second AND gate 30 is an adder 36, typicallyimplemented so as to take the twos complement of a signal. The XOR gate32 is in electrical communication with the output of the second memorydevice and a gate combination 40. The coefficient generator of thisembodiment also includes a null device or pull down 34 in electricalcommunication with the output of the first memory device.

The coefficient generator also includes a code converter 38 inelectrical communication with the receiver 12 for converting the inputsignal, if necessary, to a 12 bit value having 11 bits representing thevalue and 1 bit for the sign. The coefficient generator of thisembodiment also uses a 6 bit token stored in the second memory device toaddress the values stored in the first memory device. As with theprevious embodiment, the tokens operate in conjunction with the secondAND gate 30 and adder 36 to take the negative of the output of the firstmemory device, if the sign bit of the token indicates the negative ofthe value. Further, the null or pull down device 34 and the zero bit ofthe token operate to null or zero the output of the first memory device,if the token indicates that the value should be zero.

Still further, the coefficient generator includes a first 60 latch forlatching the input signal and a second latch 62 for latching out theoutput coefficient values. The coefficient generator also includes aninput 44 and gate combination 40 for using the coefficient generator todetermine the coefficients of an inverse function of the signal.Further, the coefficient generator includes reset device 64 forresetting the memory and outputs 56 and 58 for outputting thecoefficient and channel number.

With reference to FIG. 14, in operation in this embodiment, for eachsample, the receiver receives a sample of the signal and inputs thesample to the first memory device 22. (See step 800). For eachcoefficient, inputs, 18 and 20, are provided to the second memory devicerepresenting the sample number and coefficient number. (See step 810).Based on the inputs, the second memory device outputs a token having 4bits representing the sample and coefficient number, 1 bit representingwhether the value is negative, and 1 bit representing whether the valueis zero or not. (See step 820). The first memory device, in turn,receives the token from the second memory device and the value of thesample from the receiver. Based on these values, the first memory devicegenerates a term representing the contribution of the sample to thecoefficient. (See step 830).

Additionally, the sign bit of the sample and the output of the sign bitof the token are supplied to the second AND gate 30. If either the signof the signal is negative or the sign bit of the token is set, thesecond AND gate outputs a carry bit to the adder 36. The adder will makethe output of the first memory device negative. (See steps 840 and 850).

Likewise, the token and the signal are both provided to the first ANDgate 28. If either the signal or the token indicates a zero value, azero value will be output by the first AND gate 28. The zero value issent to the second AND gate 30, which prohibits the second AND gate 30from negating the signal. Further, a zero value is output to the firstmemory device, which disables the first memory device. Due to thedisablement of the first memory device, the null or pull down device 34outputs a zero value representing the value of the coefficient. (Seesteps 860 and 870). The term of the coefficient is then output.

The term is next provided to the adder 44, which also receives theprevious value of the coefficient from the third memory device 48. Thethird memory device is also connected to the second memory device. Thetoken from the second memory device addresses the coefficient stored inthe third memory device, which, in turn, is output to the adder foradding to the term. The term is added to the existing coefficient by theadder. (See step 880).

After, the coefficient is updated, the coefficient generator nextdetermines whether the last sample has been processed. (See step 900).Specifically, the AND gate 52 is connected to the six most significantbits of the counter, which designate the sample number. If the samplenumber is the last sample number of the set, (in this case the 64thsample), the six most significant bits of the counter will be all ones.When all ones are input to the AND gate 52, the AND gate outputs a oneindicating that the last sample has been received.

If the last sample has not been received, the crossbar or selector 46directs the updated coefficient from the adder 44 to the third memorydevice 48, where the updated coefficient is stored. (See step 900). Thenull or pull down device 50 also outputs a zero on the output indicatingthat the coefficients have not been calculated.

On the other hand, if the last sample has been received, the crossbar 46directs the updated coefficient from the adder 44 to the output. (Seestep 910). Further, the null or pull down device 50 is directed by thecross bar to zero or null the value stored in the third memory device asa reset. Further, the AND gate 54 indicates that the coefficient valueoutput is a valid value, instead of zero.

The above steps are repeated for each coefficient until all of thecoefficients have been updated with the sample. (See step 920 and 930).Further, the process is repeated for each sample, until all samples arereceived and each coefficient is updated. (See step 940).

Additionally, the first and second latches, 60 and 62, are synchronizedwith the counter so as to output the coefficients and receive a newsample based on the clock cycle. Further, the reset device 64 resets thememory.

As detailed above, the apparatus, methods, and computer program productsof the present invention process a plurality of samples and generate thecoefficients of the function based on the samples. In some embodimentsof the present invention, after the plurality of samples have beenreceived, the apparatus, methods, and computer program products of thepresent invention output the generated coefficients, reset thecoefficients, and again take samples of the signal. In some embodiments,however, it may be advantageous to generate and output a complete set ofcoefficients as each new sample is received and processed. This isreferred to as a-Sliding Aperture Fourier Transform (SAFT).

In this embodiment, the apparatus, methods, and computer programproducts of the present invention do not reset each of the coefficientsto zero after the final sample of a plurality of samples has beenreceived and the coefficients have been output. Instead, the apparatus,methods, and computer program products of the present invention replacethe first sample of the previous plurality of samples with the nextreceived sample. Using this new sample, the apparatus, methods, andcomputer program products of the present invention output a next set ofcoefficients. As such, instead of generating a set of coefficients foreach “batch” of samples, the apparatus, methods, and computer programproducts of the present invention generates a set of coefficients eachtime a new sample is received, thereby providing a new set ofcoefficients for each time a new sample is received.

The present invention provides several apparatus, methods, and computerprogram products for generating a set of coefficients each time a newsample is received. In each of these embodiments, the apparatus,methods, and computer program products of the present invention replacethe contribution of the first sample of the previous plurality ofsamples with the contribution of the next sample received and thenoutput the new coefficients. For example, in one embodiment, theapparatus, methods, and computer program products of the presentinvention initially store each of the samples as they are received andgenerates a first set of coefficients when the last sample of theplurality of samples has been received. Further, when a new sample ofthe input signal is received, (after the predetermined plurality ofsamples has already been received), the apparatus, methods, and computerprogram products of the present invention apply the mathematicalfunction associated with the coefficients to the new sample and generatea term based on the new sample for each coefficient. To replace the newsample with the first sample of the plurality of the samples, thegenerated term of the new sample is subtracted from the term associatedwith the first sample of the predetermined plurality of samples that waspreviously stored in a memory device. Following this subtraction, thecoefficients are updated by the difference between the terms based uponthe new sample and the first sample of the predetermined plurality ofsamples.

In another embodiment of the present invention, to replace the newsample with the first sample of the plurality of samples, the apparatus,method, and computer program products of the present invention subtractthe term based upon a first sample of the predetermined plurality ofsamples from each of the coefficients and adds the term based upon thenew sample to each of the coefficients. As such, in one embodiment, theterms for the new and oldest sample are first subtracted from each otherand the remainder is added to the coefficients, while in anotherembodiment, the term associated with the oldest sample is subtractedfrom each coefficient and the term associated with the new sample isadded to the coefficients. This second embodiment typically experiencesless computational drift and is illustrated in FIG. 15.

Specifically, the coefficient generator 10 of FIG. 15 includes all ofthe components of the coefficient generator illustrated and described inFIG. 13. However, the coefficient generator of FIG. 15 further includesa forth memory device 66 in electrical communication with the thirdmemory device 48 for storing the terms associated with each sample of aplurality of samples. The coefficient generator further includes anadder 68 in electrical communication with the third and forth memorydevices for subtracting the term associated from the first sample of aprevious plurality of samples from the term associated with newlyreceived sample.

With reference to FIG. 16, in operation in this embodiment, similar toprevious embodiments, for each sample, the receiver receives a sample ofthe signal and inputs the sample to the first memory device 22. (Seestep 1000). For each coefficient, inputs, 18 and 20, are provided to thesecond memory device representing the sample number and coefficientnumber, (see step 1010), and based on the inputs, the second memorydevice outputs a token. (See step 1020). Based on the token and sample,the first memory device generates a term representing the contributionof the sample to the coefficient. (See step 1030).

If either the sign of the signal is negative or the sign bit of thetoken is set, the second AND gate outputs a carry bit to the adder 36.The adder will make the output of the first memory device negative. (Seesteps 1040 and 1050). Likewise, if either the signal or the tokenindicates a zero value, a zero value is output by the first AND gate 28.

The zero value is output to the first memory device, which disables thefirst memory device. Due to the disablement of the first memory device,the null or pull down device 34 outputs a zero value representing thevalue of the coefficient. (See steps 1060 and 1070). For the zero case,sign is ignored. The term of the coefficient is then output.

The term is next provided to the adder 44, which also receives theprevious value of the coefficient from the third memory device 48. Thethird memory device is also connected to the second memory device. Thetoken from the second memory device addresses the coefficient stored inthe third memory device, which, in turn, is output to the adder foradding to the term. The term is added to the existing coefficient by theadder. (See step 1080).

The forth memory device is also connected to the second memory device.The token from the second memory device addresses the term stored in theforth memory device representing the term associated with the firstsample of the plurality of samples, (i.e., the oldest sample). The termis provided to the adder 68, where the term is subtracted from theupdated coefficient. (See step 1090). The term associated with the newsample is stored in the forth memory device, (see step 1100), theupdated coefficient is stored in the third memory device, (see step1110), and also output. (See step 1120). The above steps are repeatedfor each coefficient until all of the coefficients have been updatedwith the sample. (See steps 1130 and 1140).

As illustrated in some of the embodiments above, the apparatus, methods,and computer program products of the present invention may be used inparallel for a series of channels for which the present inventiongenerates for each channel coefficients of a function representing asignal on the channel. As detailed above, the present inventiondetermines the coefficients of the function representative of signal bycombining each sample upon receipt with the mathematical functionassociated with the sample and the coefficient. Further, as detailedabove, the different combinations of the samples and coefficients may bepre-calculated and stored in an addressable memory device or may becomputed by a gated function with reference to a value associated withthe token. Typically, the tokens that address the cells of the memorydevice are derived from state information obtained from the counterindicating the coefficient and the sample. While in the normaloperation, the tokens and memory device are used to determine thecoefficients of a function that is representative of a signal, thesetokens and memory devices may also be used repetitively by adding bitsto the counter at appropriate locations and thus service a multiplicityof channels. In this embodiment, additional coefficient memory cellsmaintain the additional coefficients, and a channel number may be outputas a convenience to the user. It is still possible employ an electricalsignal to determine the forward coefficients or to determine the inversefunction of the input.

Further, while in the normal operation, the tokens and memory device areused to determine the coefficients of a function that is representativeof a signal, these tokens and memory devices may also be usedrepetitively by adding bits to the counter at appropriate locations andthus service a multiplicity of channels. In this embodiment, additionalcoefficient memory cells maintain the additional coefficients, and achannel number may be output as a convenience to the user. By lettingconsecutive samples be treated as different channels it is possible tothus produce interleaved transforms. The interleaved transforms may besent to a second similar process to produce two-dimensional transforms,for example.

As detailed above, the apparatus, methods, and computer program productsof the present invention are capable of not only determining thecoefficients of a function but also the coefficients of an inversefunction. This is accomplished in many instances by switching theaddresses of the tokens, such that the tokens address the valuesrepresenting the inverse function. In instances in which the coefficientgenerator is used with a plurality of channels. The coefficientgenerator may be advantageously controlled such that for one channel itprovides the coefficients of a function representative of one signal,while also providing the coefficients of an inverse function of anothersignal for a separate channel.

As detailed in the various embodiments illustrated above, the apparatus,methods, and computer program products of the present invention updateeach coefficient as each sample is received. Further, in someembodiments, the apparatus, methods, and computer program products ofthe present invention outputs the coefficients each time a new sample isreceived. This is advantageous as it allows individual coefficients ofinterest to be observed and tracked. Individual coefficients of interestmay be tracked by controlling the coefficient generator to output thesecoefficients. This provides a user with a new set of coefficients inreal or near real-time for observance.

An additional advantage, is that the coefficients can also be updatedwith different resolutions. Specifically, there may be instances wheresome of the coefficients are of greater interest or there is limitedhardware resources such that not all coefficients can be properlyprocessed and stored. In these instances, the coefficient generator canbe controlled to only update certain coefficients or to update somecoefficients with each sample, while coefficients of less importance areupdated with fewer of the samples.

In addition to providing apparatus and methods, the present inventionalso provides computer program products for determining the coefficientsof a function representative of an input-signal based on a predeterminedplurality of samples of the input signal. The computer program productshave a computer readable storage medium having computer readable programcode means embodied in the medium. The computer readable storage mediummay replace the coefficient generator and perform the functions of thecoefficient generator through software. Further, computer readablestorage medium may control the coefficient generator by providing theaddresses for determining the coefficients.

The computer-readable program code means includes first computerinstruction means for receiving each of the samples one at a time.Further, the computer-readable program code means includes secondcomputer instruction means for updating the coefficients of the functionbased on each sample as the sample is received without awaiting receiptof all samples to thereby decrease the latency of the time required todetermine the coefficients of the function. In a further embodiment,each coefficient is comprised of at least one term that is at leastpartially based upon a combination of a sample and a mathematicalfunction. In this embodiment, the computer-readable program code meansfurther includes third computer instruction means for determining arespective term of each coefficient by combining each sample uponreceipt with the mathematical function associated with the sample andthe coefficient. In still another embodiment, the each sample onlycontributes to one term of each coefficient. In this embodiment, thesecond computer instruction means updates each of the coefficients basedon each sample upon receipt without requiring the sample to thereafterbe stored.

The present invention also provides computer program products forreducing the number of values that must be stored to represent thepossible mathematical terms of a function. In this embodiment, thecomputer program products include a computer readable storage mediumhaving computer readable program code means embodied in the medium. Thecomputer-readable program code means includes first computer instructionmeans for generating a first list of all possible mathematical terms ofthe function. A second computer instruction means systematicallycompares each mathematical term in the list to all other mathematicalterms in the list to determine which of the mathematical terms areredundant. The computer-readable program code also includes thirdcomputer instruction means for storing in a second list all of theunique mathematical terms of the function, such that there are noredundant mathematical terms of the function in the second list.

In one embodiment of the present invention, the function is periodic andsymmetrical about zero, such that some of the mathematical terms of thefunction have the same magnitude and different signs. In thisembodiment, the second computer instruction means compares the magnitudeof each mathematical term in the list to the magnitude of each of theother mathematical terms in the list to determine which of themathematical terms have the same magnitude. Further, the third computerinstruction means stores in the second list all of the mathematicalterms having unique magnitudes. The computer-readable program code meansof this embodiment further includes fourth computer instruction meansfor creating a token associated with each mathematical term, where thetoken indicates the magnitude stored in the second list associated withthe mathematical term and the sign associated with the mathematicalterm.

In another embodiment, at least one of the mathematical terms has amagnitude of zero. In this embodiment, the computer-readable programcode means further includes fourth computer instruction means forcreating a token associated with the mathematical term indicating thatthe mathematical term is zero such that said storing step does not storethe mathematical term in the second list.

In some embodiments, the computer-readable program code means furtherincludes fourth computer instruction means for addressing each of themathematical terms in the second list, such that the mathematical termsmay be retrieved. In a further, embodiment, the function isrepresentative of a signal and is defined by samples of the signal,where a sample of the signal is one of a finite number of possiblevalues. In this embodiment, the first computer instruction meansgenerates a first list of all possible combinations of the possiblevalues of the sample and the mathematical terms of the function.Further, the second computer instruction means systematically compareseach combination in the list to all other combinations in the list todetermine which of the combinations are redundant, and the thirdcomputer instruction means stores in a second list all of the uniquecombinations, such that there are no redundant combinations in thesecond list.

In addition to providing computer program products that generate thecoefficients of a function and computer program products that reduce thenumber of stored values, the present invention also provides computerprogram products that generate a circuit design or a computer programthat determines the coefficients of a function by updating at least oneof the coefficients prior to receipt of the last sample. Specifically,as known in the art, there are computer programs that allow for theinput of specified parameters and output circuit designs or computersoftware to implement the functions defined by the parameters. Thepresent invention provides computer program products that receiveparameters concerning the functions to be performed by the system andgenerates either a circuit design or computer program for implementingthe functions. For example, intone embodiment, the computer programproduct receives all the possible mathematical terms of a function andgenerates either a circuit or computer program that uses the possiblemathematical terms to generate the coefficients of a function withreduced hardware or reduced data storage.

In this regard, FIGS. 1-16 are block diagram, flowchart and control flowillustrations of methods, systems and program products according to theinvention. It will be understood that each block or step of the blockdiagram, flowchart and control flow illustrations, and combinations ofblocks in the block diagram, flowchart and control flow illustrations,can be implemented by computer program instructions. These computerprogram instructions may be loaded onto a computer or other programmableapparatus to produce a machine, such that the instructions which executeon the computer or other programmable apparatus create means forimplementing the functions specified in the block diagram, flowchart orcontrol flow block(s) or step(s). These computer program instructionsmay also be stored in a computer-readable memory that can direct acomputer or other programmable apparatus to function in a particularmanner, such that the instructions stored in the computer-readablememory produce an article of manufacture including instruction meanswhich implement the function specified in the block diagram, flowchartor control flow block(s) or step(s). The computer program instructionsmay also be loaded onto a computer or other programmable apparatus tocause a series of operational steps to be performed on the computer orother programmable apparatus to produce a computer implemented processsuch that the instructions which execute on the computer or otherprogrammable apparatus provide steps for implementing the functionsspecified in the block diagram, flowchart or control flow block(s) orstep(s).

Accordingly, blocks or steps of the block diagram, flowchart or controlflow illustrations support combinations of means for performing thespecified functions, combinations of steps for performing the specifiedfunctions and program instruction means for performing the specifiedfunctions. It will also be understood that each block or step of theblock diagram, flowchart or control flow illustrations, and combinationsof blocks or steps in the block diagram, flowchart or control flowillustrations, can be implemented by special purpose hardware-basedcomputer systems which perform the specified functions or steps, orcombinations of special purpose hardware and computer instructions.

Many modifications and other embodiments of the invention will come tomind to one skilled in the art to which this invention pertains havingthe benefit of the teachings presented in the foregoing descriptions andthe associated drawings. Therefore, it is to be understood that theinvention is not to be limited to the specific embodiments disclosed andthat modifications and other embodiments are intended to be includedwithin the scope of the appended claims. Although specific terms areemployed herein, they are used in a generic and descriptive sense onlyand not for purposes of limitation.

Appendix 1 Example of a Program Evaluating a Standard Fourier Series

-   S1:=1 S2:=2 S3:=−1 S4:=3 S5:=−4 S6:=1 S7:=0 S8:=2    Evaluate the A0 Value.-   A0₁:=S1 A0₂:S2 A0₃:=S3 A0₄=S4-   A0₅:=S5 A0₆:=S6 A0₇:=S7 A0₈:=S8-   A0:=A0₁+A0₂+A0₃+A0₄+A0₅+A0₆+A0₇+A0₈ A0=4 Evaluate  A1    $\begin{matrix}    {{A1}_{1}:={{S1} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 1}{8} \right)}}} & \quad & {{A1}_{2}:={{S2} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A1}_{3}:={{S3} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 3}{8} \right)}}} & \quad & {{A1}_{4}:={{S4} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A1}_{5}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 5}{8} \right)}}} & \quad & {{A1}_{6}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A1}_{7}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 7}{8} \right)}}} & \quad & {{A1}_{8}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A1}:={{A1}_{1} + {A1}_{2} + {A1}_{3} + {A1}_{4} + {A1}_{5} + {A1}_{6} + {A1}_{7} + {A1}_{8}}} & \quad & {{A1} = 3.243}    \end{matrix}$ Evaluate  A2 $\begin{matrix}    {{A2}_{1}:={{S1} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 1}{8} \right)}}} & \quad & {{A2}_{2}:={{S2} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A2}_{3}:={{S3} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 3}{8} \right)}}} & \quad & {{A2}_{4}:={{S4} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A2}_{5}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 5}{8} \right)}}} & \quad & {{A2}_{6}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A2}_{7}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 7}{8} \right)}}} & \quad & {{A2}_{8}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A2}:={{A2}_{1} + {A2}_{2} + {A2}_{3} + {A2}_{4} + {A2}_{5} + {A2}_{6} + {A2}_{7} + {A2}_{8}}} & \quad & {{A2} = 2}    \end{matrix}$ Evaluate  A3 $\begin{matrix}    {{A3}_{1}:={{S1} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 1}{8} \right)}}} & \quad & {{A3}_{2}:={{S2} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A3}_{3}:={{S3} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 3}{8} \right)}}} & \quad & {{A3}_{4}:={{S4} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A3}_{5}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 5}{8} \right)}}} & \quad & {{A3}_{6}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A3}_{7}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 7}{8} \right)}}} & \quad & {{A3}_{8}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A3}:={{A3}_{1} + {A3}_{2} + {A3}_{3} + {A3}_{4} + {A3}_{5} + {A3}_{6} + {A3}_{7} + {A3}_{8}}} & \quad & {{A3} = {- 5.243}}    \end{matrix}$ Evaluate  A4 $\begin{matrix}    {{A4}_{1}:={{S1} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 1}{8} \right)}}} & \quad & {{A4}_{2}:={{S2} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A4}_{3}:={{S3} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 3}{8} \right)}}} & \quad & {{A4}_{4}:={{S4} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A4}_{5}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 5}{8} \right)}}} & \quad & {{A4}_{6}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A4}_{7}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 7}{8} \right)}}} & \quad & {{A4}_{8}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{A4}:={{A4}_{1} + {A4}_{2} + {A4}_{3} + {A4}_{4} + {A4}_{5} + {A4}_{6} + {A4}_{7} + {A4}_{8}}} & \quad & {{A4} = 12}    \end{matrix}$ Evaluate  B1 $\begin{matrix}    {{B1}_{1}:={{S1} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 1}{8} \right)}}} & \quad & {{B1}_{2}:={{S2} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B1}_{3}:={{S3} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 3}{8} \right)}}} & \quad & {{B1}_{4}:={{S4} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B1}_{5}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 5}{8} \right)}}} & \quad & {{B1}_{6}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B1}_{7}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 7}{8} \right)}}} & \quad & {{B1}_{8}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B1}:={{B1}_{1} + {B1}_{2} + {B1}_{3} + {B1}_{4} + {B1}_{5} + {B1}_{6} + {B1}_{7} + {B1}_{8}}} & \quad & {{B1} = 3.828}    \end{matrix}$ Evaluate  B2 $\begin{matrix}    {{B2}_{1}:={{S1} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 1}{8} \right)}}} & \quad & {{B2}_{2}:={{S2} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B2}_{3}:={{S3} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 3}{8} \right)}}} & \quad & {{B2}_{4}:={{S4} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B2}_{5}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 5}{8} \right)}}} & \quad & {{B2}_{6}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B2}_{7}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 7}{8} \right)}}} & \quad & {{B2}_{8}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B2}:={{B2}_{1} + {B2}_{2} + {B2}_{3} + {B2}_{4} + {B2}_{5} + {B2}_{6} + {B2}_{7} + {B2}_{8}}} & \quad & {{B2} = {- 2}}    \end{matrix}$ Evaluate  B3 $\begin{matrix}    {{B3}_{1}:={{S1} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 1}{8} \right)}}} & \quad & {{B3}_{2}:={{S2} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B3}_{3}:={{S3} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 3}{8} \right)}}} & \quad & {{B3}_{4}:={{S4} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B3}_{5}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 5}{8} \right)}}} & \quad & {{B3}_{6}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B3}_{7}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 7}{8} \right)}}} & \quad & {{B3}_{8}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B3}:={{B3}_{1} + {B3}_{2} + {B3}_{3} + {B3}_{4} + {B3}_{5} + {B3}_{6} + {B3}_{7} + {B3}_{8}}} & \quad & {{B3} = 1.828}    \end{matrix}$    Evaluate B4, All Terms are Zero for any Even Number of Samples.    $\begin{matrix}    {{B4}_{1}:={{S1} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 1}{8} \right)}}} & \quad & {{B4}_{2}:={{S2} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 2}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B4}_{3}:={{S3} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 3}{8} \right)}}} & \quad & {{B4}_{4}:={{S4} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 4}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B4}_{5}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 5}{8} \right)}}} & \quad & {{B4}_{6}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 6}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B4}_{7}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 7}{8} \right)}}} & \quad & {{B4}_{8}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 8}{8} \right)}}}    \end{matrix}$ $\begin{matrix}    {{B4}:={{B4}_{1} + {B4}_{2} + {B4}_{3} + {B4}_{4} + {B4}_{5} + {B4}_{6} + {B4}_{7} + {B4}_{8}}} & {{B4} = {{- 7.348} \cdot 10^{- 15}}}    \end{matrix}$    Adjusting the Classical Coefficients to the Forms Used:    $\begin{matrix}    {{D\quad C\quad{value}} = {{A0}/N}} & \quad & {{ADC}:=\frac{A0}{8}}    \end{matrix}$    Truncation Value: Divide A4 by 2. ${A4T}:=\frac{A4}{2}$    Which gives the Fourier Transform:-   ADC=0.5 A1=3.243 A2=2 A3=−5.243 A4T=6    -   B1=3.828 B2=−2 B3=1.828 $\begin{matrix}        {{FT}:=\begin{bmatrix}        {A1} & {A2} & {A3} & {A4T} \\        {B1} & {B2} & {B3} & {ADC}        \end{bmatrix}} \\        {{FT} = \begin{bmatrix}        3.243 & 2 & {- 5.243} & 6 \\        3.828 & {- 2} & 1.828 & 0.5        \end{bmatrix}}        \end{matrix}$

Appendix 2

Example of a program evaluating a Fast Fourier Series according to oneembodiment of the present invention.

All computations are done on a sample-by-sample basis with one registerdedicated to each coefficient and being updated with each successivesample.

-   S1:=1 On arrival of the first sample all coefficients are processed    with respect to it. $\begin{matrix}    {{A01}:={S1}} & \quad & \quad \\    {{A11}:={{{S1} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 1}{8} \right)}} & \quad & {{A21}:={{{S1} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 1}{8} \right)}} \\    {{A31}:={{{S1} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 1}{8} \right)}} & \quad & {{A41}:={{{S1} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 1}{8} \right)}} \\    {{B11}:={{{S1} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 1}{8} \right)}} & \quad & {{B21}:={{{S1} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 1}{8} \right)}} \\    {{B31}:={{{S1} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 1}{8} \right)}} & \quad & {{B41}:={{{S1} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 1}{8} \right)}}    \end{matrix}$-   S2:=2 On arrival of the second sample all coefficients are updated    with it. $\begin{matrix}    {{A02}:={S2}} & \quad & \quad \\    {{A12}:={{{S2} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 2}{8} \right)}} & \quad & {{A22}:={{{S2} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 2}{8} \right)}} \\    {{A32}:={{{S2} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 2}{8} \right)}} & \quad & {{A42}:={{{S2} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 2}{8} \right)}} \\    {{B12}:={{{S2} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 2}{8} \right)}} & \quad & {{B22}:={{{S2} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 2}{8} \right)}} \\    {{B32}:={{{S2} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 2}{8} \right)}} & \quad & {{B42}:={{{S2} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 2}{8} \right)}}    \end{matrix}$-   A0₁₂:=A01+A02-   A1₁₂:=A11+A12 A2₁₂:=A21+A22 A3₁₂:=A31+A32 A4₁₂:=A41+A42-   B1₁₂:=B11+B12 B2₁₂:=B21+B22 B3₁₂:=B31+B32 B4₁₂:=B41+B42-   S3:=−1 On arrival of the third sample all coefficients are updated    with it. $\begin{matrix}    {{A03}:={S3}} & \quad & \quad \\    {{A13}:={{{S3} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 3}{8} \right)}} & \quad & {{A23}:={{{S3} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 3}{8} \right)}} \\    {{A33}:={{{S3} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 3}{8} \right)}} & \quad & {{A43}:={{{S3} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 3}{8} \right)}} \\    {{B13}:={{{S3} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 3}{8} \right)}} & \quad & {{B23}:={{{S3} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 3}{8} \right)}} \\    {{B33}:={{{S3} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 3}{8} \right)}} & \quad & {{B43}:={{{S3} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 3}{8} \right)}}    \end{matrix}$-   A0₁₃:=A0₁₂+A03-   A1₁₃:=A1₁₂+A13 A2₁₃:=A2₁₂+A23 A3₁₃:=A3₁₂+A33 A4₁₃:=A4₁₂+A43-   B1₁₃:=B1₁₂+B13 B2₁₃:=B2₁₂+B23 B3₁₃:=B3₁₂+B33 B4₁₃:=B4₁₂+B43-   S4:=3 On arrival of the fourth sample all coefficients are updated    with it. $\begin{matrix}    {{A04}:={S4}} & \quad & \quad \\    {{A14}:={{{S4} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 4}{8} \right)}} & \quad & {{A24}:={{{S4} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 4}{8} \right)}} \\    {{A34}:={{{S4} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 4}{8} \right)}} & \quad & {{A44}:={{{S4} \cdot \cos}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 4}{8} \right)}} \\    {{B14}:={{{S4} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 1 \cdot 4}{8} \right)}} & \quad & {{B24}:={{{S4} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 2 \cdot 4}{8} \right)}} \\    {{B34}:={{{S4} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 3 \cdot 4}{8} \right)}} & \quad & {{B44}:={{{S4} \cdot \sin}\quad\left( \frac{2 \cdot \pi \cdot 4 \cdot 4}{8} \right)}}    \end{matrix}$-   A0₁₄:=A0₁₃+A04-   A1₁₄:=A1₁₃+A14 A2₁₄:=A2₁₃+A24 A3₁₄:=A3₁₃+A34 A4₁₄:=A4₁₃+A44-   B1₁₄:=B1₁₃+B14 B2₁₄:=B2₁₃+B24 B3₁₄:=B3₁₃+B34 B4₁₄:=B4₁₃+B44-   S5:=−4 On arrival of the fifth sample all coefficients are updated    with it. $\begin{matrix}    {{A05}:={S5}} & \quad & \quad \\    {{A15}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 5}{8} \right)}}} & \quad & {{A25}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 5}{8} \right)}}} \\    {{A35}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 5}{8} \right)}}} & \quad & {{A45}:={{S5} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 5}{8} \right)}}} \\    {{B15}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 5}{8} \right)}}} & \quad & {{B25}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 5}{8} \right)}}} \\    {{B35}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 5}{8} \right)}}} & \quad & {{B45}:={{S5} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 5}{8} \right)}}}    \end{matrix}$-   A0₁₅:=A0₁₄+A05-   A1₁₅:=A1₁₄+A15 A2₁₅:=A2₁₄+A25 A3₁₅:=A3₁₄+A35 A4₁₅:=A4₁₄+A45-   B1₁₅:=B1₁₄+B15 B2₁₅:=B2₁₄+B25 B3₁₅:=B3₁₄+B35 B4₁₅:=B4₁₄+B45-   S6:=1 On arrival of the sixth sample all coefficients are updated    with it. $\begin{matrix}    {{A06}:={S6}} & \quad & \quad \\    {{A16}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 6}{8} \right)}}} & \quad & {{A26}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 6}{8} \right)}}} \\    {{A36}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 6}{8} \right)}}} & \quad & {{A46}:={{S6} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 6}{8} \right)}}} \\    {{B16}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 6}{8} \right)}}} & \quad & {{B26}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 6}{8} \right)}}} \\    {{B36}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 6}{8} \right)}}} & \quad & {{B46}:={{S6} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 6}{8} \right)}}}    \end{matrix}$-   A0₁₆:=A0₁₅+A06-   A1₁₆:=A1₁₅+A16 A2₁₆:=A2₁₅+A26 A3₁₆:=A3₁₅+A36 A4₁₆:=A4₁₅+A46-   B1₁₆:=B1₁₅+B16 B2₁₆:=B2₁₅+B26 B3₁₆:=B3₁₅+B36 B4₁₆:=B4₁₅+B46-   S7:=0 On arrival of the seventh sample all coefficients are updated    with it. $\begin{matrix}    {{A07}:={S7}} & \quad & \quad \\    {{A17}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 7}{8} \right)}}} & \quad & {{A27}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 7}{8} \right)}}} \\    {{A37}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 7}{8} \right)}}} & \quad & {{A47}:={{S7} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 7}{8} \right)}}} \\    {{B17}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 7}{8} \right)}}} & \quad & {{B27}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 7}{8} \right)}}} \\    {{B37}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 7}{8} \right)}}} & \quad & {{B47}:={{S7} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 7}{8} \right)}}}    \end{matrix}$-   A0₁₇:=A0₁₆+A07-   A1₁₇:=A1₁₆+A17 A2₁₇:=A2₁₆+A27 A3₁₇:=A3₁₆+A37 A4₁₇:=A4₁₆+A47-   B1₁₇:=B1₁₆+B17 B2₁₇:=B2₁₆+B27 B3₁₇:=B3₁₆+B37 B4₁₇:=B4₁₆+B47-   S8:=2 On arrival of the eighth sample all coefficients become    complete in a single update. The subscript “F” is used rather than    18 to designate final coefficients. $\begin{matrix}    {{A08}:={S8}} & \quad & \quad \\    {{A18}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 1 \cdot 8}{8} \right)}}} & \quad & {{A28}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 2 \cdot 8}{8} \right)}}} \\    {{A38}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 3 \cdot 8}{8} \right)}}} & \quad & {{A48}:={{S8} \cdot {\cos\left( \frac{2 \cdot \pi \cdot 4 \cdot 8}{8} \right)}}} \\    {{B18}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 1 \cdot 8}{8} \right)}}} & \quad & {{B28}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 2 \cdot 8}{8} \right)}}} \\    {{B38}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 3 \cdot 8}{8} \right)}}} & \quad & {{B48}:={{S8} \cdot {\sin\left( \frac{2 \cdot \pi \cdot 4 \cdot 8}{8} \right)}}}    \end{matrix}$-   F:=18 A0_(F):=A0₁₇+A08-   A1_(F):=A1₁₇+A18 A2_(F):=A2₁₇+A28 A3_(F):=A3₁₇+A38 A4_(F):=A4₁₇+A48-   B1_(F):=B1₁₇+B18 B2_(F):=B2₁₇+B28 B3_(F):=B3₁₇+B38 B4_(F):=B4₁₇+B48    Adjusting the Classical Coefficients to the Forms Used:-   DC value=A0/N ${ADC}:=\frac{{A0}_{F}}{8}$-   Truncation Value: Divide A4 by 2. ${A4T}:=\frac{{A4}_{F}}{2}$-   B4F=0 (Identity for any even number of samples.)-   The resulting Fast Fourier Transform is thus evaluated:-   ADC=0.5 A1_(F)=3.243 A2_(F)=2 A3_(F)=−5.243 A4T=6    -   B1_(F)=3.828 B2_(F)=−2 B3_(F)=1.828        An Array is Designated for the Transform Values:        ${FT}:=\begin{bmatrix}        {A1}_{F} & {A2}_{F} & {A3}_{F} & {A4}_{T} \\        {B1}_{F} & {B2}_{F} & {B3}_{F} & {ADC}        \end{bmatrix}$        The Values are Displayed: ${FT} = \begin{bmatrix}        3.243 & 2 & {- 5.243} & 6 \\        3.828 & {- 2} & 1.828 & 0.5        \end{bmatrix}$        The complete set of incremental values are listed below:-   A01=1 A11=0.707 A21=0 A31=−0.707 A41=−1    -   B11=0.707 B21=1 B31=0.707 B41=0-   A02=2 A12 A22=−2 A32=0 A42=2    -   B12=2 B22=0 B32=−2 B42=0-   A03=−1 A13=0.707 A23=0 A33=−0.707 A43=1    -   B13=−0.707 B23=1 B33=−0.707 B43=0-   A04=3 A14=−3 A24=3 A34=−3 A44=3    -   B14=0 B24=0 B34=1.1·10⁻¹⁵ B44=−1.47·10⁻¹⁵-   A05=−4 A15=2.828 A25=−1.225·10⁻¹⁵ A35=−2.828 A45=4    -   B15=2.828 B25=−4 B35=2.828 B45=−2.449·10⁻¹⁵-   A06=1 A16=0 A26=−1 A36=0 A46=1    -   B16=−1 B26=0 B36=1 B46=0-   A07=0 A17=0 A27=0 A37=0 A47=0    -   B17=0 B27=0 B37=0 B47=0-   A08=2 A18=2 A28=2 A38=2 A48=2    -   B18=0 B28=0 B38=−1.47·10⁻¹⁵ B48=−1.959·10⁻¹⁵

1-101. (Cancelled)
 102. An on-chip interconnection system, comprising: asingle semiconductor integrated circuit (IC); a plurality ofuni-directional buses disposed in the IC; a peripheral-bus (p-bus)included in the plurality of uni-directional buses and that uses asimple non-pipelined protocol and supports both synchronous andasynchronous slave peripherals; a p-bus controller connected to thep-bus and constituting an only bus-master, and including a centralizedaddress decoder for generating a dedicated peripheral select signal, andproviding for a connection to synchronous and asynchronous slaveperipherals, and further providing for an input/output (I/O) backplanethat allows a processor to configure and control any of its slaveperipherals; and an m-bus included in the plurality of uni-directionalbuses, and for providing a direct memory access (DMA) connection fromany said slave peripherals to a main memory and permits peripherals totransfer data directly without processor intervention.
 103. The on-chipinterconnection system of claim 102, wherein, there are included notri-stated-buses, and no bidirectional buses.
 104. The on-chipinterconnection system of claim 102, wherein, each signal has only asingle buffer driver.
 105. The on-chip interconnection system of claim102, wherein, any broadcast signals are re-driven by simple buffers withno extra control logic.
 106. The on-chip interconnection system of claim102, wherein, only a single load is presented for point-to-pointsignals.
 107. The on-chip interconnection system of claim 102, wherein,any included peripherals exchange only control and status information,and do not directly exchange data between themselves.
 108. The on-chipinterconnection system of claim 102, wherein, any data to be exchangedbetween peer peripherals is communicated through main memory usingeither programmed input/output (I/O) and direct memory access (DMA)transfer cycles.
 109. The on-chip interconnection system of claim 102,wherein, an exclusive use of point-to-point and broadcast signalingprovides for increased bus.utilization efficiency that result from anelimination of bus-direction turn-around cycles.
 110. The on-chipinterconnection system of claim 102, wherein, the p-bus includes aprotocol and signaling method that permit memory-mapped. AS1C-type.register control.
 111. The on-chip interconnection'system of claim 102,wherein, all signals are launched and captured on a rising edge of a busclock signal.
 112. The on-chip interconnection system of claim 102,wherein, any connected peripherals are operated at a clock signalfrequency that differs from one used by the p-bus controller byincluding a wait signal.
 113. The on-chip interconnection system ofclaim 102, wherein, the p-bus includes logic latches for lower powerconsumption.
 114. The on-chip interconnection system of claim 102,wherein, the m-bus connects a CPU and any DMA-capable peripherals to amain memory via a memory access controller (MAC).
 115. The on-chipinterconnection system of claim 102, wherein, the m-bus includes the useof pipelined address and data, and further includes hidden busarbitration.
 116. The on-chip interconnection system of claim 114,wherein, said MAC is the only slave on the m-bus bus, and all m-bustransfer cycles are initiated by said CPU and DMA-capable peripherals.117. The on-chip interconnection system of claim 114, wherein, the IC isan application specific integrated circuit (ASIC).